Toby Sanchez

AI Developer · MLOps & Platform Engineer
yaquazi@imap.cc

Summary

Engineer with a career spanning silicon to systems to AI — from VLSI design on Intel-compatible microprocessors and Nvidia's first Xbox GPU, through enterprise cloud platform engineering at Microsoft, to active development of AI-integrated production systems. Brings foundational depth in the mathematical and computational concepts underlying modern machine learning alongside hands-on experience deploying and integrating large language models. Equally effective as an individual contributor, technical lead, or hands-on architect.

Skills

AI/ML: LLM application development · agent orchestration · RAG system design · Anthropic Claude · OpenAI API · MLOps · genetic algorithms · Markov chain Monte Carlo · stochastic optimization · time-series statistical analysis · large-scale data conditioning
DevOps/Platform: Kubernetes · Terraform · Ansible · Packer · Vagrant · Docker · Helm · CI/CD pipeline development · immutable infrastructure · hybrid multi-cloud (Azure · AWS · GCP) · GitOps · FPGA synthesis pipelines
Languages: Python · Go · C · C++ · Java · Perl · Ruby · C# · PowerShell · Bash · Lisp · Verilog · VHDL · Objective-C
Data/Databases: Oracle · MySQL · SQLite · NoSQL · ETL · data warehousing · ORM · LLVM/JVM profiling
Electrical Engineering: VLSI CAD automation · GPU shader modeling · formal verification · embedded/microcontroller design · IoT · JTAG · Algorithmic Test Pattern Generation · power rail analysis
Compliance/Security: HIPAA SME · PII architecture review · secrets management · enterprise-scale regulated data systems

Experience

AI Developer

Freelance / Self-Employed — January 2024 – Present

Freelance VLSI Platform Engineer

Series B Confidential Startup + Related Clients — Jul 2021 – Present

Senior Consultant — Azure Cloud and AI

Microsoft — February 2019 – May 2021

DevOps Lead

Karma International / LawLinq.com — Nov 2017 – May 2018

Principal Engineer / Founder

Yaquazi TechWorks — Phoenix, AZ — 2002 – Jan 2019

Systems Analyst

Apollo Education Group / University of Phoenix — Phoenix, AZ — 2007 – 2010

Senior VLSI CAD Engineer

Nvidia Corporation — Austin, TX — 2000 – 2001

Senior VLSI CAD Engineer

VIA Technologies (Centaur) — Austin, TX — 1999 – 2000

Early Career

VLSI Electrical Engineer/Scientist — Hewlett-Packard, Fort Collins, CO (1998–1999)
IA-64 enterprise CPU timing validation; test vector generation automation combining HP/Intel tools with third-party Algorithmic Test Pattern Generation; automated design process flows in make, bash, tcsh, and Perl.
Component Design Engineer — Intel Corporation, Chandler, AZ (1994–1998)
Wafer and device-level characterization of microprocessor products; CPU cache timing simulations for Pentium III; test hole resolution for 486DX4; test socket temperature control module for the first mobile Pentium.

Education

Bachelor of Science, Electrical Engineering — Northern Arizona University, Flagstaff, AZ